##

ALLIANCE_TOP	= /opt/alliance-5.0

ENV_ASIMUT	= MBK_CATAL_NAME=CATAL_ASIMUT

ENV_COUGAR	= MBK_SPI_MODEL=$(ALLIANCE_TOP)/etc/spimodel.cfg ;\
		  export MBK_SPI_MODEL;\
		  MBK_IN_PH=ap ;\
		  export MBK_IN_PH;\
		  MBK_OUT_LO=spi;\
		  export MBK_OUT_LO
	
all: translate check-behavioral synthesis place-route transistors

#------------------------------------------------------------------------------
# Translate to Alliance VHDL

translate: reg_inst.vbe pipeline_instruction.vst

reg_inst.vbe: reg_inst.vhdl
	vasy -Vaop -I vhdl reg_inst

pipeline_instruction.vst pipeline_instruction_model.vbe: pipeline_instruction.vhdl
	vasy -Vaop -I vhdl -H pipeline_instruction

#------------------------------------------------------------------------------
# Simulate the pipeline_instruction model

check-behavioral:  reg_inst.vbe pipeline_instruction.vst \
			test_pipeline_instruction.pat result_sim.pat

test_pipeline_instruction.pat: test_pipeline_instruction.c
	genpat test_pipeline_instruction

result_sim.pat: pipeline_instruction.vst test_pipeline_instruction.pat
	$(ENV_ASIMUT) asimut pipeline_instruction test_pipeline_instruction result_sim

view-behav: result_sim.pat
	xpat -l result_sim 

#------------------------------------------------------------------------------
# Synthesize the pipeline_instruction4 bits

synthesis: reg_inst.vst pipeline_instruction_model.vst

reg_inst.vst: reg_inst_boom.vbe
	boog -m 0 reg_inst_boom reg_inst
	loon -m 0 -o reg_inst

pipeline_instruction_model.vst: pipeline_instruction_model_boom.vbe
	boog -m 0 pipeline_instruction_model_boom pipeline_instruction_model
	loon -m 0 -o pipeline_instruction_model

reg_inst_boom.vbe: reg_inst.vbe
	boom -i 10 -d 0 reg_inst reg_inst_boom

pipeline_instruction_model_boom.vbe: pipeline_instruction_model.vbe
	boom -i 10 -d 0 pipeline_instruction_model pipeline_instruction_model_boom

view-gates: pipeline_instruction.vst reg_inst.vst pipeline_instruction_model.vst
	xsch -l pipeline_instruction

#------------------------------------------------------------------------------
# Place and Route the pipeline_instruction4 bits

place-route: synthesis pipeline_instruction_ocp.ap pipeline_instruction_nero.ap \
		pipeline_instruction_s2r.cif

pipeline_instruction_ocp.ap: pipeline_instruction.vst
	ocp pipeline_instruction pipeline_instruction_ocp

pipeline_instruction_nero.ap: pipeline_instruction_ocp.ap pipeline_instruction.vst
	nero -p pipeline_instruction_ocp pipeline_instruction pipeline_instruction_nero

pipeline_instruction_s2r.cif: pipeline_instruction_nero.ap
	s2r pipeline_instruction_nero pipeline_instruction_s2r

view-place: synthesis pipeline_instruction_ocp.ap
	graal -l pipeline_instruction_ocp

view-route: synthesis pipeline_instruction_nero.ap
	graal -l pipeline_instruction_nero

view-real: synthesis pipeline_instruction_s2r.cif
	dreal -l pipeline_instruction_s2r

#------------------------------------------------------------------------------
# Extract transistor netlist

transistors: place-route pipeline_instruction_transistors.spi reg_inst_transistors.spi \
		
pipeline_instruction_transistors.spi: pipeline_instruction_nero.ap
	$(ENV_COUGAR); cougar -t pipeline_instruction_nero pipeline_instruction_transistors

reg_inst_transistors.spi: reg_inst_nero.ap
	$(ENV_COUGAR); cougar -t reg_inst_nero reg_inst_transistors

reg_inst_ocp.ap: reg_inst.vst
	ocp reg_inst reg_inst_ocp

reg_inst_nero.ap: reg_inst_ocp.ap reg_inst.vst
	nero -p reg_inst_ocp reg_inst reg_inst_nero
	
spice-pipeline_instruction: pipeline_instruction_transistors.spi
	$(ENV_COUGAR); xsch -I spi -l pipeline_instruction_transistors
	
spice-mux: reg_inst_transistors.spi
	$(ENV_COUGAR); xsch -I spi -l reg_inst_transistors
	
clean:
	rm -rf  *.pat \
		*.vst \
		*.xsc \
		*.vbe \
		*.boom \
		*.ap \
		*.cif \
		*.spi \
		*.dat
